DS2423 - 4kbit 1-Wire RAM with Counter

Addressing

       All 1-wire devices are factory assigned a unique 64-bit address. This address is of the form:

       FamilyCode
              8 bits

       Address
              48 bits

       CRC    8 bits

       Addressing under OWFS is in hexadecimal, of form:

              01.123456789ABC

       where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.

       The dot is optional, and the CRC code can included. If included, it must be correct.

Alarms

       None.

Author

       Paul Alfille (paul.alfille@gmail.com)

OWFS Manpage                                          2003                                             DS2423(3)

Availability

http://www.owfs.org

Datasheet

http://pdfserv.maxim-ic.com/en/ds/DS2423.pdf

Description

1-Wire1-wire is a wiring protocol and series of devices designed and manufactured by Dallas Semiconductor, Inc.
The bus is a low-power low-speed low-connector scheme where the data line can also provide power.

Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices,
including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data
loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There
are also 1-wire devices that have encryption included.

The 1-wire scheme uses a single busmaster and multiple slaves on the same wire. The bus master initiates
all communication. The slaves can be individually discovered and addressed using their unique ID.

Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.

OWFSdesignOWFS is a suite of programs that designed to make the 1-wire bus and its devices easily accessible. The
underlying principle is to create a virtual filesystem, with the unique ID being the directory, and the
individual properties of the device are represented as simple files that can be read and written.

Details of the individual slave or master design are hidden behind a consistent interface. The goal is to
provide an easy set of tools for a software designer to create monitoring or control applications. There
are some performance enhancements in the implementation, including data caching, parallel access to bus
masters, and aggregation of device communication. Still the fundamental goal has been ease of use,
flexibility and correctness rather than speed.

DS2423
The DS2423(3) is used for its counters. The internal counters (associated with pages 12 and 13) can
detect memory tampering.

The external counters A and B page been used in circuit design, such as a wind anometer. OWFS system
handles this automatically.

Family Code

1D

Name

DS2423 - 4kbit 1-Wire RAM with Counter

Special Properties

counter.Acounter.Bcounter.ALLread-only,unsignedinteger
       Debounced external counter. Associated with RAM page.14 and page.15 Note: counter increments only. It  is
       reset when the chip loses power.
       ALL returns the two values, separated by a comma. They are read sequentially.

       The property was called counters prior to OWFS version 2.9p1 and the old name is invisibly recognized for
       backwards compatibility.

   memoryread-write,binary
       512 bytes of memory.

   pages/page.0...pages/page.15pages/page.ALLread-write,binary
       Memory is split into 16 pages of 32 bytes each. Memory is RAM, contents are lost when power is lost.  ALL
       is an aggregate of the pages. Each page is accessed sequentially.

   pages/count.0...pages/count.15pages/count.ALLread-only,unsignedinteger

       Write access to each page of memory. Actually only page.12 and page.13 have write counters.
       page14 and page.15 counters are associated with the external counters.A and counters.B triggers.
       The value 0xFFFFFFFF is returned for pages/count.0 through pages/count.11ALL is an aggregate of the counters, comma separated. Each page is accessed sequentially.

Standard Properties

addressr_addressread-only,ascii
The entire 64-bit unique ID. Given as upper case hexadecimal digits (0-9A-F).
address starts with the family code
raddress is the address in reverse order, which is often used in other applications and labeling.

crc8read-only,ascii
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of
the unique ID number. Given as upper case hexadecimal digits (0-9A-F).

familyread-only,ascii
The 8-bit family code. Unique to each type of device. Given as upper case hexadecimal digits (0-9A-F).

idr_idread-only,ascii
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as
upper case hexadecimal digits (0-9A-F).
rid is the id in reverse order, which is often used in other applications and labeling.

locatorr_locatorread-only,ascii
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical
connections with a unique 1-wire code. If the connection is behind a LinkLocator the locatorwillshowaunique8-bytenumber(16characterhexadecimal)startingwithfamilycodeFE.
If no LinkLocator is between the device and the master, the locator field will be all FF.
rlocator is the locator in reverse order.

present(DEPRECATED)read-only,yes-no
Is the device currently present on the 1-wire bus?

typeread-only,ascii
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be
distiguished.

Synopsis

       RAM and counters.

       1D  [.]XXXXXXXXXXXX[XX][/[  counter.[A|B|ALL] | memory | pages/page.[0-15|ALL] | pages/count.[0-15|ALL] |
       address | crc8 | id | locator | r_address | r_id | r_locator | type ]]