DS28E04 - 1-Wire EEPROM chip (4096-bit) with seven address inputs

Addressing

       All 1-wire devices are factory assigned a unique 64-bit address. This address is of the form:

       FamilyCode
              8 bits

       Address
              48 bits

       CRC    8 bits

       Addressing under OWFS is in hexadecimal, of form:

              01.123456789ABC

       where 01 is an example 8-bit family code, and 12345678ABC is an example 48 bit address.

       The dot is optional, and the CRC code can included. If included, it must be correct.

Alarms

       Use the set_alarm property to set the alarm triggering criteria.

Author

       Paul Alfille (paul.alfille@gmail.com)

OWFS Manpage                                          2003                                        DS28E04-100(3)

Availability

http://www.owfs.org

Datasheet

http://pdfserv.maxim-ic.com/en/ds/DS28E04.pdf

Description

1-Wire1-wire is a wiring protocol and series of devices designed and manufactured by Dallas Semiconductor, Inc.
The bus is a low-power low-speed low-connector scheme where the data line can also provide power.

Each device is uniquely and unalterably numbered during manufacture. There are a wide variety of devices,
including memory, sensors (humidity, temperature, voltage, contact, current), switches, timers and data
loggers. More complex devices (like thermocouple sensors) can be built with these basic devices. There
are also 1-wire devices that have encryption included.

The 1-wire scheme uses a single busmaster and multiple slaves on the same wire. The bus master initiates
all communication. The slaves can be individually discovered and addressed using their unique ID.

Bus masters come in a variety of configurations including serial, parallel, i2c, network or USB adapters.

OWFSdesignOWFS is a suite of programs that designed to make the 1-wire bus and its devices easily accessible. The
underlying principle is to create a virtual filesystem, with the unique ID being the directory, and the
individual properties of the device are represented as simple files that can be read and written.

Details of the individual slave or master design are hidden behind a consistent interface. The goal is to
provide an easy set of tools for a software designer to create monitoring or control applications. There
are some performance enhancements in the implementation, including data caching, parallel access to bus
masters, and aggregation of device communication. Still the fundamental goal has been ease of use,
flexibility and correctness rather than speed.

DS28E04
The DS28E04(3) is a memory chip that bends the unique addressing capabilities of the 1-wire design. Some
of the ID bits can be assigned by hardware.

Family Code

1C

Name

DS28E04 - 1-Wire EEPROM chip (4096-bit) with seven address inputs

Special Properties

latch.0latch.1latch.ALLlatch.BYTEread-write,binary
The 2 pins (PIO) latch a bit when their state changes, either externally, or through a write to the pin.
Reading the latch property indicates that the latch has been set.
Writing any data to ANY latch will reset them all. (This is the hardware design).
ALL is all latch states, accessed simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

PIO.0PIO.1PIO.ALLPIO.BYTEread-write,yes-no
State of the open-drain output ( PIO ) pin. 0 = non-conducting = off, 1 = conducting = on.
Writing zero will turn off the switch, non-zero will turn on the switch. Reading the PIO state will
return the switch setting. To determine the actual logic level at the switch, refer to the sensed.0sensed.1sensed.ALLsensed.BYTE property.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

powerread-only,yes-no
Is the DS28E04 powered parasitically (=0) or separately on the Vcc pin (=1)?

sensed.0sensed.1sensed.ALLsensed.BYTEread-only,yes-no
Logic level at the PIO pin. 0 = ground. 1 = high (~2.4V - 5V ). Really makes sense only if the PIO state
is set to zero (off), else will read zero.
ALL references all channels simultaneously, comma separated.
BYTE references all channels simultaneously as a single byte. Channel 0 is bit 0.

polarityread-only,yes-no
Reports the state of the POL pin. The state of the POL pin specifies whether the PIO pins P0 and P1 power
up high or low. The polarity of a pulse generated at a PIO pin is the opposite of the pin's power-up
state.

0 PIO powers up 0

1 PIO powers up 1

porread-write,yes-no
Specifies whether the device has performed power-on reset. This bit can only be cleared to 0 under
software control. As long as this bit is 1 the device will always respond to a conditional search.

set_alarmread-write,integerunsigned(0-333)
A number consisting of 3 digits XYY, where:

X select source and logical term
0 PIO OR
1 latch OR
2 PIO AND
3 latch AND

Y select channel and polarity
0 Unselected (LOW)
1 Unselected (HIGH)
2 Selected LOW
3 Selected HIGH

All digits will be truncated to the 0-3 range. Leading zeroes are optional. Low-order digit is channel 0.

Example:

133 Responds on Conditional Search when latch.1 or latch.0 are set to 1.

222 Responds on Conditional Search when sensed.1 and sensed.0 are set to 0.

000 (0)
Never responds to Conditional Search.

Standard Properties

addressr_addressread-only,ascii
The entire 64-bit unique ID. Given as upper case hexadecimal digits (0-9A-F).
address starts with the family code
raddress is the address in reverse order, which is often used in other applications and labeling.

crc8read-only,ascii
The 8-bit error correction portion. Uses cyclic redundancy check. Computed from the preceding 56 bits of
the unique ID number. Given as upper case hexadecimal digits (0-9A-F).

familyread-only,ascii
The 8-bit family code. Unique to each type of device. Given as upper case hexadecimal digits (0-9A-F).

idr_idread-only,ascii
The 48-bit middle portion of the unique ID number. Does not include the family code or CRC. Given as
upper case hexadecimal digits (0-9A-F).
rid is the id in reverse order, which is often used in other applications and labeling.

locatorr_locatorread-only,ascii
Uses an extension of the 1-wire design from iButtonLink company that associated 1-wire physical
connections with a unique 1-wire code. If the connection is behind a LinkLocator the locatorwillshowaunique8-bytenumber(16characterhexadecimal)startingwithfamilycodeFE.
If no LinkLocator is between the device and the master, the locator field will be all FF.
rlocator is the locator in reverse order.

present(DEPRECATED)read-only,yes-no
Is the device currently present on the 1-wire bus?

typeread-only,ascii
Part name assigned by Dallas Semi. E.g. DS2401 Alternative packaging (iButton vs chip) will not be
distiguished.

Synopsis

       4096-bit EEPROM, 2 port switch

       1C  [.]XXXXXXXXXXXX[XX][/[  latch.[0-1|ALL|BYTE]  |  PIO.[0-1|ALL|BYTE] | power | sensed.[0-1|ALL|BYTE] |
       polarity | por | set_alarm | address | crc8 | id | locator | r_address | r_id | r_locator | type ]]