Verilog::Std - SystemVerilog Built-in std Package Definition

       Wilson Snyder <wsnyder@wsnyder.org>

       Verilog::Std contains the built-in "std" package required by the SystemVerilog standard.

       Verilog-Perl is part of the <https://www.veripool.org/> free Verilog EDA software tool suite.  The latest
       version is available from CPAN and from <https://www.veripool.org/verilog-perl>.

       Copyright 2009-2024 by Wilson Snyder.  This package is free software;  you  can  redistribute  it  and/or
       modify  it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic
       License Version 2.0.

       std({standard})
           Return  the definition of the std package.  Optionally pass the language standard, defaulting to what
           Verilog::Language::language_standard returns if unspecified.

       Verilog::Std - SystemVerilog Built-in std Package Definition

       Verilog-Perl

perl v5.40.1                                       2025-04-20                                           Std(3pm)

       Internally used by Verilog::SigParser, etc.

          use Verilog::Std;
          print Verilog::Std::std;