enum nvme_lm_queue_attributes - I/O Submission and I/O Completion Queue Attributes

NVME_LM_IOSQPC_MASK Mask to get the Physically Contiguous (PC) bit for this I/O submission queue. NVME_LM_IOSQPC_SHIFT Shift to get the PC bit for this I/O submission queue NVME_LM_IOSQPRIO_MASK Mask to get the Priority for this I/O submission queue. NVME_LM_IOSQPRIO_SHIFT Shift to get the Priority for this I/O submission queue. NVME_LM_IOCQPC_MASK Mask to get the Physicaly Contiguous (PC) bit for this I/O completion queue. NVME_LM_IOCQPC_SHIFT Shift to get the PC bit for this I/O completion queue. NVME_LM_IOCQIEN_MASK Mask to get the Interrupts Enabled bit for this I/O completion queue NVME_LM_IOCQIEN_SHIFT Shift to get the Interrupts Enabled bit for this I/O completion NVME_LM_S0PT_MASK Mask to get the value of the Phase Tag bit for Slot 0 of this I/O completion queue. NVME_LM_S0PT_SHIFT Shift to get the value of the Phase Tag bit for Slot 0 of this I/O completion queue. NVME_LM_IOCQIV_MASK Mask to get the Interrupt Vector (IV) for this I/O completion queue. NVME_LM_IOCQIV_SHIFT Shift to get the IV for this I/O completion queue. August 2025 enum nvme_lm_queue_attributes libnvme(2)

enum nvme_lm_queue_attributes - I/O Submission and I/O Completion Queue Attributes

enum nvme_lm_queue_attributes { NVME_LM_IOSQPC_MASK , NVME_LM_IOSQPC_SHIFT , NVME_LM_IOSQPRIO_MASK , NVME_LM_IOSQPRIO_SHIFT , NVME_LM_IOCQPC_MASK , NVME_LM_IOCQPC_SHIFT , NVME_LM_IOCQIEN_MASK , NVME_LM_IOCQIEN_SHIFT , NVME_LM_S0PT_MASK , NVME_LM_S0PT_SHIFT , NVME_LM_IOCQIV_MASK , NVME_LM_IOCQIV_SHIFT };