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Cver - Verilog Simulator

Contents

Author

       Pragmatic C Software Corp.

       This  manual  page was written by NIIBE Yutaka <gniibe@fsij.org>, for the Debian project (but may be used
       by others).

Cver 20050529                                     December 2006                                          CVER(1)

Description

       Cver is a full 1995 IEEE P1364 standard Verilog simulator.  This is "GPL Cver", the GPL version.

Name

       Cver - Verilog Simulator

Synopsis

cver [options][verilogfiles...]

See Also

Man Pages
Verilog::Getopt Man Pages
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simulator Man Pages
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MCP
Corp-finance-data-connector-service Mcp
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